AV311 pic m3U VPX Virtex 7 FPGA Octal 14 bit 1.25 Gsps ADC Conduction or Air-Cooled

AV 113 Phased-Array Radar-Receiver EW-ESM – MIMO.
The AV113 is part of ApisSys’ range of High Speed data conversion and signal processing solu¬tions based on the VITA 46, VPX standard.
The AV113 is fully compliant with OpenVPX standard, accommodating various communication protocols such as PCIe, SRIO, 1 Gbit and XAUI 10 Gbit Ethernet, as well as non OpenVPX adopted standard such as Aurora.
The AV113 combines eight 14-bit 1.25 Gsps ADCs with ultra-high processing power delivered by Xilinx® Virtex® 7 FPGA, making it ideally suited for fully synchronous multiple channels test and measurement, Electronic Warfare, Wideband Radar Receivers  .
The AV113 comes with complete software drivers for Windows and Linux. An FPGA Development Kit is provided including all necessary cores to build user FPGA application.

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AV107 pic3U VPX Virtex 7 FPGA Quad 12 bit 2.5 Gsps ADC Conduction or Air-Cooled

AV 107 Phased-Array Radar-Receiver EW-ESM
The AV107 is part of ApisSys’ signal processing solutions based on the VITA 46, VPX standard.
The AV107 is fully compliant with OpenVPX standard, accommodating various communication
protocols such as PCIe, SRIO, 1 Gbit and XAUI 10 Gbit Ethernet, as well as non OpenVPX adopted
standard such as Aurora. The AV107 combines four 12-bit 2.5 Gsps ADCs with ultra high processing power delivered by
Xilinx® Virtex® 7 FPGA, making it ideally suited for fully synchronous multiple channels test and
measurement, Electronic Warfare, Ultra Wideband Radar Receivers or LIDAR applications.
The AV107 features an internal ultra low jitter reference and four independent clock synthesizers.

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AV121 large-03U VPX Virtex 7 FPGA Quad 12 bit 4.0 Gsps ADC Conduction or Air-Cooled AV121

The AV121 is part of ApisSys’ range of High Speed data conversion and signal processing solutions
based on the VITA 46, VPX standard.
The AV121 is fully compliant with the OpenVPX standard, accommodating various communication
protocols such as PCIe, SRIO, 1 Gbit and XAUI 10 Gbit Ethernet, as well as non OpenVPX adopted
standard such as Aurora.
The AV121 combines four 12-bit 4.0 Gsps ADCs with ultra-high processing power delivered by
Xilinx® Virtex® 7 FPGA, making it ideally suited for fully synchronous multiple channels test and
measurement, Electronic Warfare, Ultra Wideband Radar Receivers or MIMO applications.
The AV121 features an internal ultra-low jitter reference .

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AV119 large-03U VPX Virtex 7 FPGA Dual RF in – dual RF out,1 GHz instantaneous bandwidth AV119

The AV119 is part of ApisSys’ range of High Speed data conversion and signal processing solutions
based on the VITA 46, VPX standard.
The AV119 is fully compliant with the OpenVPX standard, accommodating various communication
protocols such as PCIe, SRIO, 1 Gbit and XAUI 10 Gbit Ethernet, as well as non OpenVPX adopted
standard such as Aurora.
The AV119 combines two 12-bit 2.5 Gsps ADCs plus 2 RF out built on 16-bit 2.5 Gsps I/Q DAC
and RF modulators with ultra-high processing power delivered by Xilinx® Virtex® 7 FPGA, making
it ideally suited for fully synchronous multiple channels test and measurement, Electronic Warfare,
Ultra Wideband Radar Transceivers or MIMO applications.

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Contact Details

EPS-Tech Ltd.

Industrial park, Tzur-Igal
2 Bazelet St,

Israel, 44862

Tel: +972-9-749-8585
Fax: +972-9-749-8686
Email: This email address is being protected from spambots. You need JavaScript enabled to view it.